Low-Noise Multi-Gate Pixel Transistor for Sub-Micron Pixel CMOS Image Sensors

As the pixel size of CMOS image sensors (CIS) is rapidly decreasing to sub-micron pixels due to strong demand from mobile applications, a low-noise multi-gate pixel transistor for sub-micron pixel CIS has been proposed. It has been fully customized for pixel transistors of source follower amplifiers...

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Bibliographic Details
Published in2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) pp. 347 - 348
Main Authors Kitamura, Shota, Kimizuka, Naohiko, Honjo, Akiko, Baba, Koichi, Kurobe, Toshihiro, Kumano, Hideomi, Toyofuku, Takuya, Takeuchi, Kouhei, Nishimura, Shota, Kato, Akihiko, Hirano, Tomoyuki, Oike, Yusuke
Format Conference Proceeding
LanguageEnglish
Published IEEE 12.06.2022
Subjects
1/f noise
Gain measurement
Image capture
Prototypes
Transistors
Very large scale integration
Voltage measurement
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Summary:As the pixel size of CMOS image sensors (CIS) is rapidly decreasing to sub-micron pixels due to strong demand from mobile applications, a low-noise multi-gate pixel transistor for sub-micron pixel CIS has been proposed. It has been fully customized for pixel transistors of source follower amplifiers in CIS by a shallow trench isolation full-etching process. Compared to a planar-type pixel transistor with the same footprint, the random telegraph signal and 1/f noise has been decreased by 91% and 48%, respectively. The transconductance has been improved by 43%. A prototype CIS with 0.7μm pixels successfully presented a full image capture for the first time using multi-gate pixel transistors.
ISSN:2158-9682
DOI:10.1109/VLSITechnologyandCir46769.2022.9830386