Investigation of 14 NM Contact Tungsten Gap-Filling Performance

The contact glue layer (CTGL) and tungsten deposition process have been optimized systematically to improve the contact tungsten gap filling performance at 14nm FinFET technology node. The different pre-clean methods (PCXT and SICONI) also have been studied to verify the impact on contact profile. T...

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Bibliographic Details
Published in2022 China Semiconductor Technology International Conference (CSTIC) pp. 1 - 3
Main Authors Wang, Xiaofang, Xu, Jiazhang, Yuan, Zhiqi, Cheng, Yingbo, Zeng, Zhaoqin, Bao, Yu, Zhou, Haifeng, Fang, Jingxun, Zhang, Yu
Format Conference Proceeding
LanguageEnglish
Published IEEE 20.06.2022
Subjects
14nm Technology
Contact
Etching
Filling
FinFETs
Logic gates
Pre-clean
TiN
Tungsten
W seam
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Summary:The contact glue layer (CTGL) and tungsten deposition process have been optimized systematically to improve the contact tungsten gap filling performance at 14nm FinFET technology node. The different pre-clean methods (PCXT and SICONI) also have been studied to verify the impact on contact profile. The W seam defect counts were reduced by 99% through optimizing pre-clean, Ti/TiN and tungsten deposition condition. Furthermore, the relationship between process thickness and W seam defect was surveyed by Taguchi method. The results show that the W seam defect is strongly correlated with Ti thickness and weakly correlated with PCXT when its etch amount below 10 A. The W seam defect counts decrease with lower PCXT EA/thinner Ti thickness and increase with lower SICONI etching amount.
DOI:10.1109/CSTIC55103.2022.9856771