H2ONoC: A Hybrid Optical-Electronic NoC Based on Hybrid Topology

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 25; no. 1; pp. 330 - 343
• Main Authors: Fusella, Edoardo, Cilardo, Alessandro
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2017; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Chip multiprocessors (CMPs); Crosstalk; emerging technologies; Energy consumption; Insertion loss; Network topology; ON-chip communication; Optical communication; Optical losses; optical networks-on-chip (ONoCs); Optical packet switching; Optical switches; Optical waveguides; Photonics; Power consumption; Product development; System on chip; Topology; Toruses
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2016.2581486

Next-generation chip multiprocessors will require communication performance levels that cannot be achieved by traditional electronic ON-chip interconnects. Silicon photonics has recently emerged as a promising alternative to handle future communication needs thanks to the ultrahigh bandwidth and low power consumption. Optical networks-on-chip (ONoCs) are affected by insertion loss and crosstalk noise effects, which constrain the network scalability and impact the power consumption. This paper proposes a hybrid electronic/photonic, hybrid-topology ONoC (H 2 ONoC), based on a novel architecture aimed at mitigating the above effects. This paper provides a thorough description of the H 2 ONoC architectures as well as an experimental evaluation based on both synthetic benchmarks and real-world applications. Compared with hybrid mesh- and torus-based network-on-chip architectures, H 2 ONoC achieves, respectively, 13% and 18% less insertion loss, 32% and 8% less energy consumption under synthetic traffic, 74% and 14% less energy consumption with real applications, as well as better SNR when the system size scales up.