A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS

This paper presents an integrated LNA for mm-wave applications implemented in 90 nm CMOS technology. Modeling methodology based solely on electromagnetic simulations, RC parasitic extraction and device measurements up to 20 GHz allows for "correct-by-construction" design at mm-wave frequen...

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Bibliographic Details
Published inESSCIRC 2007 - 33rd European Solid-State Circuits Conference pp. 352 - 355
Main Authors Pellerano, S., Palaskas, Y., Soumyanath, K.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2007
Subjects
CMOS technology
Coplanar transmission lines
Coplanar waveguides
Frequency measurement
Gain
Noise measurement
Power transmission lines
Semiconductor device modeling
Silicon
Wideband
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Summary:This paper presents an integrated LNA for mm-wave applications implemented in 90 nm CMOS technology. Modeling methodology based solely on electromagnetic simulations, RC parasitic extraction and device measurements up to 20 GHz allows for "correct-by-construction" design at mm-wave frequency and first-pass silicon success. The dual-stage cascode LNA has a peak gain of 15.5 dB at 64 GHz with an NF of 6.5 dB, while drawing 26 mA per stage from 1.65 V. Output P 1dB is 3.8 dBm. At V DD = 1.26 V, each stage draws 19 mA, with a peak gain and a NF of 13.5 dB and 6.7 dB respectively. To the authors' knowledge, this is the lowest measured NF at mm-wave frequencies reported so far in CMOS. Measured results are in excellent agreement with simulations. A custom set-up for mm- wave NF measurement is also extensively described in the paper.
ISBN:9781424411252
1424411254
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2007.4430316