Measures of Syntactic Complexity for Modeling Behavioral VHDL
Complexity measures are potentially useful in developing modeling and re-use strategies and are recognized as being useful indictors of development cost and lifecycle metrics for systems design. In this paper, a syntactic measure complexity model for VHDL descriptions is investigated. The approach l...
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Published in | 32nd Design Automation Conference pp. 684 - 689 |
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Main Author | |
Format | Conference Proceeding |
Language | English |
Published |
ACM
1995
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Subjects | |
Online Access | Get full text |
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Summary: | Complexity measures are potentially useful in developing modeling and re-use strategies and are recognized as being useful indictors of development cost and lifecycle metrics for systems design. In this paper, a syntactic measure complexity model for VHDL descriptions is investigated. The approach leverages similarities between VHDL models and software algorithms, where syntactic modeling has been previously applied. Aspects of the measure, including observed and estimated model length, volume, syntactic information, and abstraction level are defined and discussed. As a principle result, syntactic information modeling is related to Kolmogorov intrinsic complexity as a minimum design size implementation. Experimental data on VHDL modeling and complexity measurement is presented, with potential model comprehensibility and resource estimation applications. |
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ISBN: | 0897917251 9780897917254 |
ISSN: | 0738-100X |
DOI: | 10.1109/DAC.1995.250052 |