A Dataflow Analysis for Mode Set Optimization in DSP Instruction Sets

A digital signal processor (DSP) has a specific architecture to process multimedia data very fast, but its complexity makes it difficult that a compiler generates highly optimized codes. A mode set problem is one of these difficulties. A mode set in DSP architectures provides extended functionalitie...

Full description

Saved in:
Bibliographic Details
Published in7th IEEE International Conference on Computer and Information Technology (CIT 2007) pp. 775 - 780
Main Authors Jiho Chu, Youngsun Han, Seon Wook Kim
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2007
Subjects
Arithmetic
Data analysis
Digital signal processing
Digital signal processors
Embedded system
Flow graphs
Instruction sets
Multimedia systems
Optimizing compilers
Signal processing algorithms
Online AccessGet full text

Cover

More Information
Summary:A digital signal processor (DSP) has a specific architecture to process multimedia data very fast, but its complexity makes it difficult that a compiler generates highly optimized codes. A mode set problem is one of these difficulties. A mode set in DSP architectures provides extended functionalities to an instruction. The instruction performs differently depending on the mode set. In this paper, we propose a code optimization technique to eliminate redundant mode set instructions. For our purpose, we introduce a dataflow analysis for the mode set optimization based on a control flow graph. The proposed algorithm guarantees that the dynamic number of mode set instructions is minimal. As an experiment, we applied our algorithm to a sign extension mode (SXM) in the Zaram compactDSP 16 architecture, and we could eliminate redundant mode set instructions by 50% on average and up to 93% in our measured benchmarks.
ISBN:9780769529837
0769529836
DOI:10.1109/CIT.2007.79