55GCPS CAM using 5b analog flash

An analog CAM based on analog flash technology contains 256k computing nodes, organized into 4k rows of 64 synapses each, and is able to process in parallel the best match based on Manhattan distance between a 64-dimensional input vector and all 4b stored reference vectors. Each computing node is ca...

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Bibliographic Details
Published in1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers pp. 44 - 45
Main Authors Kramer, A., Canegallo, R., Chinosi, M., Doise, D., Gozzini, G., Navoni, L., Rolandi, P.L., Sabatini, N.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1997
Subjects
Analog computers
CADCAM
Circuits
Computer aided manufacturing
Computer architecture
Concurrent computing
Matrix converters
Microelectronics
Switches
Voltage
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Summary:An analog CAM based on analog flash technology contains 256k computing nodes, organized into 4k rows of 64 synapses each, and is able to process in parallel the best match based on Manhattan distance between a 64-dimensional input vector and all 4b stored reference vectors. Each computing node is capable of storing and matching 5b data (1.28Mb total storage), making this CAM well suited to problems in pattern recognition that require limited precision. The chip uses analog flash technology for data storage, programmable on-chip references, and offset compensation.
ISBN:9780780337213
0780337212
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.1997.585253