Testing digital to analog converters based on oscillation-test strategy using sigma-delta modulation

• Published in: Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) pp. 40 - 46
• Main Authors: Hassan, I.H.S., Arabi, K., Kaminska, B.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1998
• Subjects: Analog-digital conversion; Automatic testing; Built-in self-test; Circuit testing; Costs; Delta-sigma modulation; Digital-analog conversion; Integrated circuit testing; Performance evaluation; System testing
• ISBN: 9780818690990; 0818690992
• ISSN: 1063-6404; 2576-6996
• DOI: 10.1109/ICCD.1998.727021

This paper presents a new built-in self test technique for digital to analog converters (DAC). The technique consists of inserting the DAC under test in an oscillating loop forming a sigma-delta modulator. The DAC distortions are then seen at the sigma-delta output as a digital PDM information. A simple up/down counter converts the PDM output into a digital word that is used as test signature. Functional specifications such as offset, differential nonlinearity (DNL), integral nonlinearity (INL) and dynamic distortions of the DAC can be digitally measured using this technique. As a feature of sigma-delta modulation, the analog circuits used to form the modulator loop (integrator and comparator) do not need to be high performance in terms of accuracy and speed. This characteristic allows the technique to have no limitations for resting high frequency and high resolution DACs. This technique can also be applied to test ADC-DAC pair for applications that require both data converters in the same chip.