Semiconductor process and structural optimization of shallow trench isolation-defined and polysilicon-bound source/drain diodes for ESD networks

The impact of MOSFET source/drain junction scaling on the ESD robustness of shallow trench isolation (STI)-defined diode structures is shown for the first time. ESD robustness improvements to STI-bound p/sup +/ diodes using germanium preamorphization and deep B11 implants, and polysilicon-bordered E...

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Bibliographic Details
Published inElectrical Overstress/ Electrostatic Discharge Symposium Proceedings. 1998 (Cat. No.98TH8347) pp. 151 - 160
Main Authors Voldman, S., Geissler, S., Nakos, J., Pekarik, J., Gauthier, R.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1998
Subjects
CMOS technology
Cobalt
Electrostatic discharge
Germanium
Implants
Isolation technology
MOSFET circuits
Robustness
Semiconductor diodes
Very large scale integration
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Summary:The impact of MOSFET source/drain junction scaling on the ESD robustness of shallow trench isolation (STI)-defined diode structures is shown for the first time. ESD robustness improvements to STI-bound p/sup +/ diodes using germanium preamorphization and deep B11 implants, and polysilicon-bordered ESD networks are also discussed.
ISBN:9781878303912
1878303910
DOI:10.1109/EOSESD.1998.737034