Evaluation of the issues involved with test structures for the measurement of sheet resistance and linewidth of copper damascene interconnect

The effect of the barrier layer and dishing in copper interconnects causes extra difficulties in measuring sheet resistance and linewidth when compared with equivalent measurements on nondamascene processed tracks. This paper examines these issues and, for the first time, quantifies the effects of d...

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Bibliographic Details
Published inICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153) pp. 195 - 200
Main Authors Smith, S., Walton, A.J., Ross, A.W.S., Bodammer, G.K.H., Stevenson, J.T.M.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2001
Subjects
Buildings
Conducting materials
Copper
Data mining
Electric resistance
Electric variables measurement
Electrical resistance measurement
Integrated circuit interconnections
Microelectronics
Testing
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Summary:The effect of the barrier layer and dishing in copper interconnects causes extra difficulties in measuring sheet resistance and linewidth when compared with equivalent measurements on nondamascene processed tracks. This paper examines these issues and, for the first time, quantifies the effects of diffusion barrier layers and CMP dishing on the extraction of R/sub s/ from Greek cross type structures and the effect this has on linewidth measurement.
ISBN:0780365119
9780780365117
DOI:10.1109/ICMTS.2001.928661