Hierarchical modeling and control for re-entrant semiconductor fabrication lines: a mini-fab benchmark

This paper addresses the problem of controlling reentrant semiconductor fabrication lines. To focus the presentation, a virtual five-machine six-step mini-fab is used. This mini-fab developed by Intel in collaboration with ASU is intended to contain all of the features which make a real line difficu...

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Published in1997 IEEE 6th International Conference on Emerging Technologies and Factory Automation Proceedings, EFTA '97 pp. 508 - 513
Main Authors Tsakalis, K.S., Flores-Godoy, J.-J., Rodriguez, A.A.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1997
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Summary:This paper addresses the problem of controlling reentrant semiconductor fabrication lines. To focus the presentation, a virtual five-machine six-step mini-fab is used. This mini-fab developed by Intel in collaboration with ASU is intended to contain all of the features which make a real line difficult to control. Industry-like policies are discussed and compared with control-theoretic hierarchical policies.
ISBN:0780341929
9780780341920
DOI:10.1109/ETFA.1997.616323