VLSI implementation of vector quantization using distributed arithmetic

• Published in: 1996 IEEE International Symposium on Circuits and Systems (ISCAS) Vol. 2; pp. 668 - 671 vol.2
• Main Authors: Cao, H.Q., Weiping Li
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1996
• Subjects: CMOS technology; Costs; Digital arithmetic; Encoding; Mean square error methods; Silicon; Space technology; Throughput; Vector quantization; Very large scale integration
• ISBN: 9780780330733; 0780330730
• DOI: 10.1109/ISCAS.1996.541813

A new full search vector quantization (VQ) encoding algorithm under mean square error (MSE) criterion is introduced using adaptive distributed arithmetic (DA). The MSE computations in VQ can be converted to inner product computations which can be efficiently carried out using DA. However, the conventional wisdom of storing all possible combinations of codevectors requires an extremely large memory which makes DA unrealistic for VQ. In the new algorithm, the combinations of the input vector are stored in a memory and the codevectors are used as addresses. This dramatically reduces the memory requirement of VQ using DA so that a VLSI design becomes possible. A VLSI structure for the implementation of this distributed arithmetic VQ (DAVQ) algorithm is proposed. It is estimated that a single chip using 1.2 /spl mu/ CMOS technology can perform a real-time exhaustive search VQ of 256 16-dimensional codevectors for video compression of CIF format at 30 frames/second.