Karandikar, A., Pan, P., & Liu, C. (1997). Optimal clock period clustering for sequential circuits with retiming. Proceedings International Conference on Computer Design VLSI in Computers and Processors, 122-127. https://doi.org/10.1109/ICCD.1997.628858
Chicago Style (17th ed.) CitationKarandikar, A.K, Peichen Pan, and C.L Liu. "Optimal Clock Period Clustering for Sequential Circuits with Retiming." Proceedings International Conference on Computer Design VLSI in Computers and Processors 1997: 122-127. https://doi.org/10.1109/ICCD.1997.628858.
MLA (9th ed.) CitationKarandikar, A.K, et al. "Optimal Clock Period Clustering for Sequential Circuits with Retiming." Proceedings International Conference on Computer Design VLSI in Computers and Processors, 1997, pp. 122-127, https://doi.org/10.1109/ICCD.1997.628858.