The ARM9 family-high performance microprocessors for embedded applications

• Published in: Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) pp. 230 - 235
• Main Author: Segars, S.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1998
• Subjects: Cache memory; Clocks; Costs; Energy consumption; GSM; Microprocessors; Personal digital assistants; Pipelines; Read only memory; Thumb
• ISBN: 9780818690990; 0818690992
• ISSN: 1063-6404
• DOI: 10.1109/ICCD.1998.727055

Portable applications such as mobile phones, pagers, and PDAs are continually growing in sophistication. This places an increasing burden on the embedded microprocessor to provide high performance while retaining low power consumption and small die size. The ARM7TDMI microprocessor has been highly successful in these application areas. However, as products grow in complexity more processing power is required while the expectation on battery life also increases. This has lead to the introduction of the ARM9 family, a range of high performance low power embedded microprocessors targeted at next generation embedded applications. This paper focuses on the implementation of 2 members of the ARM9 family, the ARM9TDMI integer core and the ARM940T cached processor. These offer performance in excess of 150 MIPS while retaining low power consumption. The evolution from the ARM7 to the ARM9 microarchitecture is described and the tradeoffs between low power consumption and high performance discussed.