Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation

• Published in: VLSI-SoC: Design Trends Vol. 621; pp. 65 - 85
• Main Authors: Ajayi, Tutu, Kamineni, Sumanth, Fayazi, Morteza, Cherivirala, Yaswanth K., Kwon, Kyumin, Gupta, Shourya, Duan, Wenbo, Lee, Jeongsup, Chen, Chien-Hen, Saligane, Mehdi, Sylvester, Dennis, Blaauw, David, Dreslinski Jr, Ronald, Calhoun, Benton, Wentzloff, David D.
• Format: Book Chapter
• Language: English
• Published: Switzerland Springer International Publishing AG 2021; Springer International Publishing
• Series: IFIP Advances in Information and Communication Technology
• Subjects: analog generator; analog synthesis; SoC generator
• ISBN: 9783030816407; 3030816400
• ISSN: 1868-4238; 1868-422X
• DOI: 10.1007/978-3-030-81641-4_4

This chapter presents the world’s first autonomous mixed-signal SoC framework, driven entirely by user constraints, along with a suite of automated generators for analog blocks. The process-agnostic framework takes high-level user intent as inputs to generate optimized and fully verified analog and mixed-signal blocks using a cell-based design methodology. The approach is highly scalable and silicon-proven by an SoC prototype which includes 2 PLLs, 3 LDOs, 1 SRAM, and 2 temperature sensors fully integrated with a processor in a 65 nm CMOS process. The physical design of all blocks, including analog, is achieved using optimized synthesis and APR flows in commercially available tools. The framework is portable across different planar and FinFET CMOS processes and requires no-human-in-the-loop, dramatically accelerating design time.