Improving off-state capacitance of SOI-CMOS RF switches: how good are air microcavities?

• Published in: ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC) pp. 109 - 112
• Main Authors: Gheysens, Daniel, Fleury, Alain, Monfray, Stephane, Gianesello, Frederic, Cathelin, Philippe, Robillard, Jean-Francois, Troadec, David, Dubois, Emmanuel
• Format: Conference Proceeding
• Language: English
• Published: IEEE 11.09.2023
• Subjects: Air microcavities; Atmospheric modeling; Capacitance; CMOS; Europe; Hafnium; Multiprocessor interconnection; Off-state capacitance; Radio frequency; RF switch; SOI; Switches; Vapor phase selective etching
• ISSN: 2378-6558
• DOI: 10.1109/ESSDERC59256.2023.10268524

This paper investigates the reduction of the off-state capacitance (C OFF ) of SOI-CMOS RF switches induced by the introduction of air microcavity in the back-end interconnection network. A detailed methodology combining electromagnetic and semiconductor transport simulations is used to separately evaluate the respective contributions of the interconnects and junction capacitances. A baseline switch and an optimized version of the same are studied to evaluate their ability to take advantage of air microcavities. Simulations show a reduction of 73 fF/mm regardless of the switch structure considered, resulting in a 24.6% and 30.6% improvement in C OFF for baseline and optimized switches, respectively, bringing the optimized version to a 60fs record Ron × Coff. This concept was experimentally implemented using a partial etch process that resulted in a reduction of 21.7 fF/mm, i.e., 7.2%. Finally, the implementation of a more isotropic and selective etching process using HF in vapor phase is shown to approach the optimal configuration of air microcavities.