Software Performance Estimation in MPSoC Design

• Published in: 2007 Asia and South Pacific Design Automation Conference pp. 38 - 43
• Main Authors: Oyamada, M., Wagner, F.R., Bonaciu, M., Cesario, W., Jerraya, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.01.2007
• Subjects: Analytical models; Computer architecture; Embedded system; Hardware; Neural networks; Performance analysis; Refining; Software performance; Space exploration; System analysis and design
• ISBN: 1424406293; 9781424406296
• ISSN: 2153-6961; 2153-697X
• DOI: 10.1109/ASPDAC.2007.357789

Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-dominated embedded systems. This work proposes an integrated methodology for system design and performance analysis. An analytic approach based on neural networks is used for high-level software performance estimation. At the functional level, this analytic tool enables a fast evaluation of the performance to be obtained with selected processors, which is an essential task for the definition of a "golden" architecture. From this architectural definition, a tool that refines hardware and software interfaces produces a bus-functional model. A virtual prototype is then generated from the bus-functional model, providing a global, cycle-accurate simulation model and offering several features for design validation and detailed performance analysis. Our work thus combines an analytic approach at functional level and a simulation-based approach at bus functional level. This provides an adequate trade-off between estimation time and precision. A multiprocessor platform implementing an MPEG4 encoder is used as case study, and the analytic estimation results in errors only up to 17% when compared to the virtual platform simulation. On the other hand, the analytic estimation takes only 17 seconds, against 10 minutes using the cycle-accurate simulation model.