Foreground digital calibration of non-linear errors in pipelined A/D converters

A foreground digital calibration technique for pipelined ADC is proposed which accounts for linear error correction, while an error estimation technique for amplifier non-linearity is suggested as a reference for non-linear error correction. The calibration algorithm is based on applying a slow inpu...

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Bibliographic Details
Published in2010 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 569 - 572
Main Authors Adel, H, Dessouky, M, Louerat, M, Gicquel, H, Haddara, H
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2010
Subjects
Analog circuits
Calibration
Digital circuits
Energy consumption
Error analysis
Error correction
Laboratories
Nonlinear distortion
Redundancy
Temperature
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Summary:A foreground digital calibration technique for pipelined ADC is proposed which accounts for linear error correction, while an error estimation technique for amplifier non-linearity is suggested as a reference for non-linear error correction. The calibration algorithm is based on applying a slow input to the ADC to automatically correct for linear errors, while depending on the accuracy of Digital Error Correction (DEC) to estimate and correct for non-linear errors. The proposed calibration scheme is demonstrated for an 11 bit pipelined ADC, and gives SNDR improvement over 30 dB, while using low specifications residue amplifier to reduce power consumption.
ISBN:1424453089
9781424453085
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2010.5537533