Passive and Active Combined Attacks on AES Combining Fault Attacks and Side Channel Analysis

Tamper resistance of hardware products is currently a very popular subject for researchers in the security domain. Since the first Kocher side-channel (passive)attack, the Bellcore researchers and Biham and Shamir fault (active) attacks, many other side-channel and fault attacks have been published....

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Bibliographic Details
Published in2010 Workshop on Fault Diagnosis and Tolerance in Cryptography pp. 10 - 19
Main Authors Clavier, Christophe, Feix, Benoit, Gagnerot, Georges, Roussellet, Mylène
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2010
Subjects
Advanced Encryption Standard
Analytical models
Collision Fault Analysis
Correlation
Correlation Side Channel Analysis
Cryptography
Doped fiber amplifiers
Microprocessors
Power demand
Resistance
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Summary:Tamper resistance of hardware products is currently a very popular subject for researchers in the security domain. Since the first Kocher side-channel (passive)attack, the Bellcore researchers and Biham and Shamir fault (active) attacks, many other side-channel and fault attacks have been published. The design of efficient countermeasures still remains a difficult task for IC designers and manufacturers as they must also consider the attacks which combine active and passive threats. It has been shown previously that combined attacks can defeat RSA implementations if side-channel countermeasures and fault protections are developed separately instead of being designed together. This paper demonstrates that combined attacks are also effective on symmetric cryptosystems and shows how they may jeopardize a supposedly state of the art secure AES implementation.
ISBN:1424478448
9781424478446
DOI:10.1109/FDTC.2010.17