Improved \pi-Delayed Harmonic Rejection N-Path Mixer for Low Power Consumption and Multistandard Receiver

• Published in: 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS) pp. 170 - 173
• Main Authors: Shakoush, A. Al, Lauga-Larroze, E., Podevin, F., Ibrahim, S., Fesquet, L., Bourdel, S.
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 01.06.2020; PsychNology Journal
• Subjects: blocker; Clocks; Cognitive science; Complexity theory; Harmonic analysis; harmonic rejection; mixer-first; Mixers; N-Path mixer; Overlapping; Power harmonic filters; receiver; Receivers; Resilience; software-defined radio; Overlapping; blocker; receiver; mixer-first; harmonic rejection; N-Path mixer mixer-first receiver softwaredefined radio harmonic rejection blocker Overlapping; softwaredefined radio; N-Path mixer
• ISSN: 1720-7525; 1720-7525
• DOI: 10.1109/NEWCAS49341.2020.9159792

The purpose of this paper is to study the complexity of the Harmonic Rejection N-Path Mixer HRNPM based receivers. In this framework, a HR-NPM architecture has been discussed based on the π-delayed driving signals. The harmonic rejection and the system complexity have been improved with this new architecture such that the Harmonic rejection achieved by this structure is the same of the conventional HR-2NPM and the system complexity has been reduced by half, where as the number of the gain stages and the switches has been reduced. In this context, a 5-path mixer is thus proposed. It allows rejecting up to the 8 th harmonic with only 2 differential gain stages by appropriately implementing the switches whereas only the 6 th harmonic would be rejected with conventional HR-8PM topologies having 3 amplifier stages. Our structure shows high resilience to clocks overlapping effects.