The hybrid element method for EMC problems in VLSI circuits

• Published in: 3rd International Conference on Computation in Electromagnetics (CEM 96) pp. 72 - 77
• Main Authors: Nowacka, E.B, van der Meijs, N.P, Dewilde, P
• Format: Conference Proceeding
• Language: English
• Published: London IEE 1996
• Subjects: Electromagnetic compatibility and interference; Finite element analysis; Semiconductor integrated circuits; boundary element method; high-density layouts; simulation; capacitive coupling; voltage pulse; electromagnetic induction; finite element method; transients; dielectric stratification; boundary-elements methods; capacitance; bounded localized regions; VLSI; EMC problems; integrated circuits; IC layout; electromagnetic compatibility; VLSI circuits; integrated circuit layout; BEM; finite element analysis; conductor line; FEM; hybrid element method; layout design; crosstalk; capacitance extraction system; capacitive interconnects
• ISBN: 0852966571; 9780852966570
• DOI: 10.1049/cp:19960161

One of the important EMC problems in integrated circuits (ICs) is crosstalk. This phenomenon can be an especially troublesome problem in high-density layouts, when a voltage pulse on one conductor line induces transients on other neighboring lines. Capacitive coupling is frequently the primary cause of crosstalk. In order to verify, via simulation, the correct behavior of ICs before costly fabrication, these capacitances must be determined from the layout design of the circuit. This process is called capacitance extraction. We propose the hybrid element method (HEM) for the modeling of capacitive interconnects, which is capable of dealing with disturbances and/or irregularities in a dielectric stratification. The key concept of our method is to combine the boundary element method (BEM) and the finite element method (FEM) in one capacitance extraction system, so that the BEM is used in the regular regions of the layout of the IC, while the FEM is used in the bounded, localized regions that exhibits irregularities.