Lithography independent high accuracy fabrication and characterization of next generation Nano-MOS-transistors with L = 25 nm and W = 75 nm

• Published in: Microelectronic engineering Vol. 84; no. 5; pp. 1484 - 1487
• Main Authors: Kallis, K.T., Horstmann, J.T., Fiedler, H.L.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Amsterdam Elsevier B.V 01.05.2007; Elsevier Science
• Subjects: Applied sciences; CMOS-process; Electronics; Exact sciences and technology; Integrated circuits; Integrated circuits by function (including memories and processors); Lithography; Microelectronic fabrication (materials and surfaces technology); Molecular electronics, nanoelectronics; MOS-transistor; Nanostructure; Quantum-effects; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Sub-50 nm-dimensions; Transistors; Sub-50 nm-dimensions; Nanostructure; MOS-transistor; CMOS-process; Lithography; Quantum-effects; Transistor gate; Quantum effect; HTTP; Nanoelectronics; Microelectronic fabrication; Manufacturing process; Complementary MOS technology; Development cost; Integrated circuit; MOS transistor; Modem; Custom circuit

“The club of people who can afford an extreme sub-micron ASIC or COTS design is getting pretty exclusive” [Ron Wilson, EE Times – Platform Chips a Key, May 2000, <http://www.eetimes.com>]. This statement describes appropriately the problem of modern manufacturing processes. The 2005 Internatio...