AlGaN/AlN/SiC Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors with Al 2 O 3 Gate-Oxide and Step-Graded AlGaN Channel

• Published in: Meeting abstracts (Electrochemical Society) Vol. MA2021-01; no. 33; p. 1086
• Main Authors: Lee, Ching-Sung, Lin, Yun-Jung, Hsu, Wei-Chou, Huang, Yi-Ping, You, Cheng-Yang, Lee, Kuan-Tin, Lee, Jia-Luen, Cheng, Chih-Chung, Jian-Hong, Ke
• Format: Journal Article
• Language: English
• Published: 30.05.2021
• ISSN: 2151-2043; 2151-2035
• DOI: 10.1149/MA2021-01331086mtgabs

Al 0.75 Ga 0.25 N/n-Al x Ga 1-x N/Al 0.75 Ga 0.25 N/AlN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs), grown on a SiC substrate, with step-graded Si-doped (n = 3 × 10 18 cm -3 ) widegap Al x Ga 1-x N channel and Al 2 O 3 gate-dielectric are investigated. Increased Al-compositions with x = 0.25, 0.5, and 0.75 towards the buffer were devised in the composite widegap channel. The high-k Al 2 O 3 dielectric/passivation layer was grown by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Experimental comparisons were made with respect to a conventional Schottky-gate HFET. The epitaxial structure of the studied Al 2 O 3 -dielectric Al 0.75 Ga 0.25 N/n-Al x Ga 1-x N/Al 0.75 Ga 0.25 N/AlN MOS-HFET (sample A) and Schottky-gate HFET (sample B). Both devices have the identical epitaxial structure grown on a SiC substrate by using a low-pressure metal-organic chemical vapor deposition (LP-MOCVD) system. The layer structure includes an undoped AlN buffer, a 20-nm undoped Al 0.75 Ga 0.25 N barrier, a 150-nm step-graded Si-doped (n = 3 × 10 18 cm -3 ) Al x Ga 1-x N channel (x = 0.25, 0.5, and 0.75), and a 20-nm undoped Al 0.75 Ga 0.25 N barrier. Standard photolithography and lift-off techniques were used for device processing. For sample B, mesa etching was performed with respect to a 100-nm thick Ni barrier by using an inductively coupled-plasma reactive ion etcher (ICP-RIE). Flow rates were tuned and set at 10 sccm and 20 sccm for the mixed etching gases of BCl 3 and Cl 2 , respectively. The 20-nm undoped Al 0.75 Ga 0.25 N barrier was etched away before deposition of source/drain electrodes. Ti (10 nm)/Al (50 nm)/Ni (10 nm)/Au (50 nm) were evaporated. The source/drain ohmic contacts were formed by annealing the sample for 25 seconds at 900°C by using a rapid thermal annealing (RTA) system (ULVAC MILA-5000). Then, 30-nm thick Al 2 O 3 layer was deposited on the Al 0.75 Ga 0.25 N barrier by using the USPD technique. Finally, gate electrode of Ni (100 nm)/Au (50 nm) was evaporated after gate photolithography. As for sample A, the gate electrode was formed directly on the surface of Al 0.75 Ga 0.25 N barrier without oxide deposition. Improved device performance of the present MOS-HFET design have been obtained, including maximum drain-source current density ( I DS, max ) of 130.1 A/mm at V GS = 10 V and V DS = 20 V, I DS at V GS = 0 V ( I DSS0 ) of 83.1 mA/mm, on/off-current ratio ( I on / I off ) of 1.4 × 10 7 , maximum extrinsic transconductance ( g m, max ) of 11.8 mS/mm, two-terminal off-state gate-drain breakdown voltage ( BV GD ) of -404 V, and three-terminal on-state drain-source breakdown voltage ( BV DS ) of 364 V at 300 K. The present MOS-HFET design has also shown high spectral responsivity (SR) of 737 A/W under 250-nm deep-UV radiation at 300 K.