A case study in the development of multi-media educational material: the VHDL interactive tutorial

While industry and academia have been aware of the need for an intensive study of embedded digital system design, resource constraints, fuzzy objectives, and short-time horizon have handicapped progress. The 150M Rapid Prototyping of Application Specific Signal Processors (RASSP) program is a major...

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Bibliographic Details
Published inIEEE transactions on education Vol. 40; no. 4; p. 17 pp.
Main Authors Gadient, A.J., Stinson, J.A., Taylor, T.C., Aylor, J.H., Klenke, R.H., Salinas, M.H., Madisetti, V.K., Egolf, T., Famorzadeh, S., Karns, L.N., Carter, H.W.
Format Journal Article
LanguageEnglish
Published IEEE 01.11.1997
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Summary:While industry and academia have been aware of the need for an intensive study of embedded digital system design, resource constraints, fuzzy objectives, and short-time horizon have handicapped progress. The 150M Rapid Prototyping of Application Specific Signal Processors (RASSP) program is a major DARPA/Tri-Service effort designed to overcome these limitations. This effort has developed a number of new technologies that will lead to dramatically shorter prototyping times and reduced life cycle costs. In a effort to ensure the successful transfer of these new technologies, the RASSP Education and Facilitation (RASSP E&F) program is working to transfer this technology into graduate and undergraduate curricula by developing and transferring educational material. Only by successfully inserting these rapid-prototyping technologies into the curricula and research activities of the university community will the long term benefits of these technologies be realized. To achieve this technology transfer objective, the RASSP E&F program has developed educational material on the key elements of rapid-prototyping of embedded digital systems technology. The result of this effort is a set of educational "modules" covering selected topics. In conjunction with IEEE, several of the modules developed by the RASSP E&F program designed to teach students the VHDL language were converted to HTML and linked with the VHDL language reference manual to form a self-paced VHDL interactive tutorial. A demonstration version of this learning tool, currently published by IEEE, is presented.
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ISSN:0018-9359
1557-9638
DOI:10.1109/13.759676