Deep Sub-Micron Strained Si 0.85 Ge 0.15 Channel p-channel Metal-Oxide-Semiconductor Field-Effect Transistors (pMOSFETs) with Ultra-Thin N 2 O-Annealed SiN Gate Dielectric

• Published in: Japanese Journal of Applied Physics Vol. 44; no. 2L; p. L278
• Main Authors: Chen, Ching-Wei, Chien, Chao-Hsin, Chen, Yi-Cheng, Hsu, Shih-Lu, Chang, Chun-Yen
• Format: Journal Article
• Language: English
• Published: 01.02.2005
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.44.L278

We have investigated the electrical characteristics of strained Si 0.85 Ge 0.15 channel p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultra-thin N 2 O-annealed SiN gate dielectric. We have found that the thickness of SiGe channel has a great impact on the device characteristics. With controlling the SiGe layer thickness thinner than 15 nm, the device depict a subthreshold swing of 68 mV/A, the interface state density of 1×10 11 eV -1 ·cm -2 , acceptable junction leakage, and more than 50% hole mobility improvement with respect to the Si channel device. Therefore, high quality interface between the gate dielectric and the strained SiGe channel can be achieved by using the N 2 O-annealed SiN gate dielectric.