Reliability of Strained SiGe Channel p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Ultra-Thin (EOT=3.1 nm) N 2 O-Annealed SiN Gate Dielectric

• Published in: Japanese Journal of Applied Physics Vol. 44; no. 6R; p. 3848
• Main Authors: Chen, Ching-Wei, Chien, Chao-Hsin, Chen, Yi-Cheng, Hsu, Shih-Lu, Chang, Chun-Yen
• Format: Journal Article
• Language: English
• Published: 01.06.2005
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.44.3848

The p-channel metal–oxide–semiconductor field-effect transistor (pMOSFET) with 50-nm-thick Si 0.85 Ge 0.15 channel and ultra-thin (EOT=3.1 nm) N 2 O-annealed SiN gate dielectric has been shown to have well-performing on/off and output characteristics. Several methodologies for the device reliability characterization, such as stress-induced-leakage-current (SILC), drain-avalanche-hot-carrier (DAHC) injection, channel hot-carrier (CHC) injection and negative-bias-temperature-instability (NBTI), have been used and the results were compared. In terms of the long-term degradation, the excellent quality of the N 2 O-annealed SiN gate dielectric can be firmly obtained because only negligible degradations have been found after stressing no matter which technique was employed. Even so, the experimental results have been compared and we found that the HC degradation is worse than the NBTI degradation and the channel-hot-carrier (CHC) stressing is the worst case for all kinds of reliability testing. Meanwhile, we have also verified that the interface state generation is the dominant mechanism responsible for the HC-induced degradation while the electron trapping dominates the device degradation for the NBTI stressing.