A Lightweight AES-256 Accelerator Design through Processing Order Optimization for Low-cost Hardware Security

In the era of AI and IoT, securing sensitive data is paramount, especially for resource-constrained edge devices. This paper presents a novel lightweight Advanced Encryption Standard (AES)-256 accelerator design that optimizes encryption and decryption processes for low-cost hardware security. By re...

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 25; no. 4; pp. 406 - 413
Main Authors Lee, Yuseong, Kang, Jaehak, Lee, Jongmin
Format Journal Article
LanguageEnglish
Published 대한전자공학회 31.08.2025
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