Study on Low-jitter and Low-power PLL Architectures for Mobile Audio Systems

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 22; no. 6; pp. 482 - 492
Main Authors Kyung, Yujin, Kim, Gwang-Sub, Baek, Donghyun
Format Journal Article
LanguageEnglish
Published 대한전자공학회 31.12.2022
Subjects
Clock generator
low jitter
reference-sampling PLL (RSPLL)
sub-sampling PLL (SSPLL)
phase-locked loop (PLL)
phase noise
multiplying delay locked loop (MDLL)
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ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2022.22.6.482