Design of Vector Register Architecture in DSP Processor for Efficient Multimedia Processing

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 7; no. 4; pp. 229 - 234
Main Authors Wu, Chou-Pin, Wu, Jen-Ming
Format Journal Article
LanguageEnglish
Published 대한전자공학회 31.12.2007
Subjects
DSP microprocessor
Register File
instruction set architecture
video signal processing
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ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2007.7.4.229