The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET

• Published in: IEEE journal of the Electron Devices Society p. 1
• Main Authors: Hwang, Junghyeon, Kim, Giuk, Joh, Hongrae, Ahn, Jinho, Jeon, Sanghun
• Format: Journal Article
• Language: English
• Published: IEEE 23.10.2024
• Subjects: Capacitance; Capacitors; Delays; Depolarization field; FeFETs; Ferroelectric FET (FeFET); Hafnia ferroelectric; Iron; Logic gates; MOS capacitors; Retention; Silicon; Switches; Voltage measurement
• ISSN: 2168-6734; 2168-6734
• DOI: 10.1109/JEDS.2024.3485869

Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<1 μ s) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: CFE ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.