基于栅控二极管研究碲镉汞器件表面效应

采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化....

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Bibliographic Details
Published in红外与毫米波学报 Vol. 36; no. 3; pp. 295 - 301
Main Author 李雄军 韩福忠 李东升 李立华 胡彦博 孔金丞 赵俊 朱颖峰 庄继胜 姬荣斌
Format Journal Article
LanguageChinese
Published 昆明物理研究所,云南昆明,650223 2017
Subjects
I-V
R0A
栅控二极管
表面钝化
长波碲镉汞
LW HgCdTe
R0A
surface passivation
长波碲镉汞
栅控二极管
-
gate-controlled diode
表面钝化
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Summary:采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化.
Bibliography:31-1577/TN
CdTe/ZnS composite passivation layers were grown with different processes, and the corre- sponding LW HgCdTe gate-controlled diodes were fabricated. The I-V measurement and analysis were carried out under different conditions for these devices. The results show that the polarity of the fixed interface charge is positive and interface charge density is high for the device prepared by the standard process. The large leakage current in the surface channel is formed under high reverse bias voltage, which has an important effect on the performance of the device. The fixed interface charge density is effectively reduced by improvement of the growth process of the passivation films, which changes the HgCdTe surface from weak inversion gradually to the fiat band condition. The surface effect is effec- tively suppressed, thus the reverse characteristics of the device can be improved significantly. In addi- tion, the number of interface traps has been greatly reduced for the device prepared by the optimized p
ISSN:1001-9014
DOI:10.11972/j.issn.1001-9014.2017.03.009