信道化接收机的结构优化和实现

TN914.3; 为了减少信道化接收机的资源消耗,对低通滤波器组实现信道化接收机的结构进行了研究.在前人将HB滤波器和FIR滤波器设计为多通道并采用时分复用方法的基础上,将NCO和CIC滤波器也做了同样处理,并在FPGA上分别实现了优化前后的两种结构,通过硬件资源消耗情况的对比,验证了此方法的有效性.在输入数据为单一频率正弦波的情况下,将信道化的结果导入Matlab进行分析,验证了此方法的正确性....

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Bibliographic Details
Published in电子技术应用 Vol. 42; no. 1; pp. 72 - 74
Main Author 罗义军 陆冬冬 李勤
Format Journal Article
LanguageChinese
Published 武汉大学电子信息学院,湖北武汉,430072%武汉大学电气工程学院,湖北武汉,430072 2016
Subjects
CIC滤波器
FPGA
NCO
信道化接收机
多通道复用
CIC filter
FPGA
channel multiplexing
channelized receiver
信道化接收机
CIC滤波器
多通道复用
NCO
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ISSN0258-7998
DOI10.16157/j.issn.0258-7998.2016.01.019

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Summary:TN914.3; 为了减少信道化接收机的资源消耗,对低通滤波器组实现信道化接收机的结构进行了研究.在前人将HB滤波器和FIR滤波器设计为多通道并采用时分复用方法的基础上,将NCO和CIC滤波器也做了同样处理,并在FPGA上分别实现了优化前后的两种结构,通过硬件资源消耗情况的对比,验证了此方法的有效性.在输入数据为单一频率正弦波的情况下,将信道化的结果导入Matlab进行分析,验证了此方法的正确性.
Bibliography:In order to reduce the hardware resource utilization of channelized receiver,the structure of channelized receiver based on LPF bank is discussed in this paper.Based on the previous study that HB filter and FIR filter are designed in channel multi-plexing,NCO and CIC filter is designed in the same way in the optimized structure.The two scheme before and after optimization are implemented on FPGA respectively,and hardware resource cost are compared to verified the efficiency of this method.The result of channelized processing is analyzed using Matlab with the input of sine wave signal,which proves the validity of the method.
Luo Yijun, Lu Dongdong, Li Qin （1.Department of Electronic Information, Wuhan University, Wuhan 430072, China ; 2.School of Electronic Engineering, Wuhan University, Wuhan 430072, China）
11-2305/TN
channelized receiver; channel multiplexing; CIC filter; NCO; FPGA
ISSN:0258-7998
DOI:10.16157/j.issn.0258-7998.2016.01.019