超高频RFID阅读器电荷泵锁相环设计

设计了一款应用于超高频RFID阅读器的整数型电荷泵锁相环。在SMIC工艺下进行设计,采用Cadence进行了后仿真和版图绘制。仿真得到系统中心频率为966MHz,输出信号幅度为1.4V,系统相位裕度为49.8°,建立时间为2us,功耗为12mW,芯片面积为880um×750um。...

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Bibliographic Details
Published in电子技术应用 Vol. 38; no. 12; pp. 38 - 40
Main Author 于洋
Format Journal Article
LanguageChinese
Published 天津大学 电子信息工程学院,天津,300072 2012
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ISSN0258-7998

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Summary:设计了一款应用于超高频RFID阅读器的整数型电荷泵锁相环。在SMIC工艺下进行设计,采用Cadence进行了后仿真和版图绘制。仿真得到系统中心频率为966MHz,输出信号幅度为1.4V,系统相位裕度为49.8°,建立时间为2us,功耗为12mW,芯片面积为880um×750um。
Bibliography:ultra high frequency ; CP-PLL ; frequency synthesis
An integer charge pump phase locked loop for UHF RFID reader was designed in the SMIC technology. The software Cacence was used to do the simulation and draw the layout. The center frequency is 966 MHz, the output signal voltage is 1.4 V,the phase margin is 49.8 degree,and the setting time is 2 uS. It consumes 12 mW with 1.8 V voltage supply. And the area of the chip is 880 um×750um.
Yu Yang (College of Electronic Information Engineering, Tianjin University, Tianjin 300072, China )
11-2305/TN
ISSN:0258-7998