Face classification using electronic synapses

• Published in: Nature communications Vol. 8; no. 1; p. 15199
• Main Authors: Yao, Peng, Wu, Huaqiang, Gao, Bin, Eryilmaz, Sukru Burc, Huang, Xueyao, Zhang, Wenqiang, Zhang, Qingtian, Deng, Ning, Shi, Luping, Wong, H.-S. Philip, Qian, He
• Format: Journal Article
• Language: English
• Published: London Nature Publishing Group UK 12.05.2017; Nature Publishing Group; Nature Portfolio
• Subjects: 639/166/987; 639/301/1005/1007; Accuracy; Arrays; CMOS; Energy consumption; Humanities and Social Sciences; multidisciplinary; Neural networks; Online instruction; Random access memory; Science; Science (multidisciplinary); Semiconductors; Transistors; Beijing China; China
• ISSN: 2041-1723; 2041-1723
• DOI: 10.1038/ncomms15199

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system. Using chips that mimic the human brain to perform cognitive tasks, namely neuromorphic computing, calls for low power and high efficiency hardware. Here, Yao et al . show on-chip analogue weight storage by integrating non-volatile resistive memory into a CMOS platform and test it in facial recognition.