Broadband plasmonic half-subtractor and digital demultiplexer in pure parallel connections

• Published in: Nanophotonics (Berlin, Germany) Vol. 11; no. 16; pp. 3623 - 3629
• Main Authors: Wu, Pei-Yuan, Chang, Yun-Chorng, Huang, Chen-Bin
• Format: Journal Article
• Language: English
• Published: Germany De Gruyter 01.09.2022; Walter de Gruyter GmbH
• Subjects: Boolean algebra; Broadband; demultiplexer; Demultiplexers; Design; Integrated circuits; Laser beams; Lasers; Nanowires; optical nanocircuits; Photonics; Plasmonics; polarization controls; Selectivity; Sensors; subtractor; surface plasmon polaritons; Wire; optical nanocircuits; polarization controls; surface plasmon polaritons; demultiplexer; subtractor
• ISSN: 2192-8614; 2192-8606; 2192-8614
• DOI: 10.1515/nanoph-2022-0267

Nanophotonic arithmetic circuits requiring cascaded Boolean operations are difficult to implement due to loss and footprint issues. In this work, we experimentally demonstrate plasmonic half-subtractor and demultiplexer circuits based on transmission-lines. Empowered by the unique polarization selectivity in the surface plasmon modal behaviors, both circuits are realized without cascading. The operations of the half-subtractor and demultiplexer can be performed using a single laser beam with three predefined linear polarizations. All of our experiments are performed using a 56 fs laser providing greater than 12.5 THz optical bandwidth. The experimental results are found in excellent quantitative accordance with numerical calculations. The photonic integrated circuit framework proposed in this work could pave the future avenue towards the realization of highly compact, multi-functional, on-chip integrated photonic processors.