Low-Consumption Synaptic Devices Based on Gate-All-Around InAs Nanowire Field-Effect Transistors
In this work, an artificial electronic synaptic device based on gate-all-around InAs nanowire field-effect transistor is proposed and analyzed. The deposited oxide layer (In 2 O 3 ) on the InAs nanowire surface serves as a charge trapping layer for information storage. The gate voltage pulse serves...
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Published in | Nanoscale research letters Vol. 17; no. 1; p. 101 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
New York
Springer US
27.10.2022
Springer Nature B.V SpringerOpen |
Subjects | |
Online Access | Get full text |
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Summary: | In this work, an artificial electronic synaptic device based on gate-all-around InAs nanowire field-effect transistor is proposed and analyzed. The deposited oxide layer (In
2
O
3
) on the InAs nanowire surface serves as a charge trapping layer for information storage. The gate voltage pulse serves as stimuli of the presynaptic membrane, and the drain current and channel conductance are treated as post-synaptic current and weights of the postsynaptic membrane, respectively. At low gate voltages, the device simulates synaptic behaviors including short-term depression and long-term depression. By increasing the amplitude and quantity of gate voltage pulses, the transition from short-term depression to long-term potentiation can be achieved. The device exhibits a large memory window of over 1 V and a minimal energy consumption of 12.5 pJ per synaptic event. This work may pave the way for the development of miniaturized low-consumption synaptic devices and related neuromorphic systems. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISSN: | 1556-276X 1931-7573 1556-276X |
DOI: | 10.1186/s11671-022-03740-1 |