Experimental Analysis of Punch-Through Conditions in Power P- I- N Diodes

• Published in: IEEE transactions on power electronics Vol. 22; no. 1; pp. 13 - 20
• Main Authors: Salah, T.B., Buttay, C., Allard, B., Morel, H., Ghedira, S., Besbes, K.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.01.2007; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Avalanche; Breakdown; Breakdown voltage; Design of experiments; Devices; Diodes; Doping profiles; Electric potential; Electric power; Electrical engineering. Electrical power engineering; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Engineering Sciences; Epitaxial layers; Exact sciences and technology; Instruments; intrinsic; Ionization; n -type ( P - I - N ) diode; Optimization; Other; Other multijunction devices. Power transistors. Thyristors; p -type; Power electronics; Power electronics, power supplies; Power system modeling; punch-through (PT); reverse-recovery; Semiconductor diodes; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Semiconductor process modeling; Simulation; Testing; Voltage; Electric breakdown; Recovery(properties); n-type (P-I-N) diode; Doping; Optimization method; Unsteady state; reverse-recovery; Experimental device; Power electronics; Experimental study; intrinsic; Optimization; Avalanche; Breakdown voltage; p type semiconductor; n type semiconductor; punch-through (PT); p-type; System simulation; Power diode; p i n diode; avalanche
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2006.886648

Commercial power diodes are optimized to feature punch-through behavior. However, a tradeoff between the width and the doping level of the diode epitaxial layer leads to various levels of optimization. For a given breakdown voltage, a shorter epitaxial layer width leads to better transient performances. Device datasheets do not cover this issue and a simple experimental setup is presented to assess the optimization conditions inside the diode epitaxial layer. Three commercial devices are tested and experimental results are confronted to device simulations. A good agreement is found