A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz

• Published in: IEEE journal of solid-state circuits Vol. 42; no. 3; pp. 583 - 591
• Main Authors: Shanfeng Cheng, Haitao Tong, Silva-Martinez, J., Karsilayan, A.I.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.03.2007; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Bandwidth; Batteries; Circuit properties; Circuits; Clocks; CMOS; CMOS logic circuits; CMOS technology; Consumption; Design. Technologies. Operation analysis. Testing; Divide by eight; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Frequency conversion; Frequency dividers; injection-locked frequency divider; Integrated circuits; Latches; Locking; Logic design; low-power frequency divider; Mobile communication; Oscillators, resonators, synthetizers; Power dissipation; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal convertors; Terminals; Voltage-controlled oscillators; Current-mode logic; Input signal; Static convertor; Output signal; Clock; low-power frequency divider; Power divider; Divide by eight; Energy dissipation; Complementary MOS technology; Frequency converter; injection-locked frequency divider; Frequency divider; Low-power electronics; Injection locked oscillators
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2006.891448

A low power divide-by-8 injection-locked frequency divider is presented. The frequency divider consists of four current-mode logic (CML) D-latches connected in the form of a four-stage ring with the differential input signal injected into the clock terminals of the latches. The output signals can be taken from the data terminals of any of the four latches. The proposed frequency divider has higher operating frequency and lower power dissipation compared with conventional static frequency dividers. Compared with existing injection-locked frequency dividers, the proposed fully differential frequency divider presents wider locking range with the center frequency independent of injection amplitude. The frequency divider is implemented in TSMC 0.18 mum CMOS technology. It consumes around 3.6 mW power with 1.8 V supply. The operating frequency can be tuned from 4 GHz to 18 GHz. The ratio of the locking range over the center frequency is up to 50% depending on the operating frequency and biasing conditions.