Process compatible polysilicon-based electrical through-wafer interconnects in silicon substrates

• Published in: Journal of microelectromechanical systems Vol. 11; no. 6; pp. 631 - 640
• Main Authors: Chow, E.M., Chandrasekaran, V., Partridge, A., Nishida, T., Sheplak, M., Quate, C.F., Kenny, T.W.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.12.2002; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Compatibility; Computational geometry; Cross-disciplinary physics: materials science; rheology; Devices; Electronics; Exact sciences and technology; Fabrication; Instruments, apparatus, components and techniques common to several branches of physics and astronomy; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuits; Materials science; Mechanical instruments, equipment and techniques; Micro- and nanoelectromechanical devices (mems/nems); Microelectromechanical systems; Micromechanical devices; Micromechanical devices and systems; Physics; Plasma etching; Semiconductor device packaging; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Semiconductors; Sensor arrays; Sensors; Silicon; Silicon substrates; Substrates; Surface cleaning, etching, patterning; Surface treatments; Wafers; Electrical connection; Encapsulation; Microelectronic fabrication; Great depth; Plasma etching; Miniaturization; Microelectromechanical device; Production process
• ISSN: 1057-7157; 1941-0158
• DOI: 10.1109/JMEMS.2002.805206

Electrical through-wafer interconnects (ETWI) which connect devices between both sides of a substrate are critical components for microelectromechanical systems (MEMS) and integrated circuits (IC), as they enable three-dimensional (3-D) structures and permit new packaging and integration geometries. Previously demonstrated ETWI are very difficult to integrate with standard semiconductor fabrication processes, not compatible with released sensors, do not permit extensive processing on both sides of the wafer, and are in general very application specific. This work describes the design, fabrication, and characterization of an ETWI technology for silicon substrates that can be broadly integrated with MEMS and IC processes. This interconnect is a passively isolated electrical through-wafer polysilicon plug, with a 20 /spl mu/m diameter, 10-14 /spl Omega/ resistance, and less than 1 pF capacitance. Plasma etching from both sides of the wafer is used to achieve a high-aspect ratio via (20:1 through 400 /spl mu/m). The process is compatible with standard lithography, standard wafer handling, subsequent high-temperature processing, and released sensors integration. N-type and p-type versions are demonstrated, and isolated ground planes are added to provide shielding against substrate noise. Electrical properties of these ETWI are measured and analytically modeled. These ETWI are appropriate for integration with devices with impedances much greater than the ETWI, such as piezoresistive and capacitive sensor arrays.