Effect of surface treatment of Si substrates and annealing condition on high- k rare earth oxide gate dielectrics

• Published in: Applied surface science Vol. 216; no. 1; pp. 302 - 306
• Main Authors: Ohshima, C., Taguchi, J., Kashiwagi, I., Yamamoto, H., Ohmi, S., Iwai, H.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Amsterdam Elsevier B.V 30.06.2003; Elsevier Science
• Subjects: Chemical oxide; Condensed matter: electronic structure, electrical, magnetic, and optical properties; Condensed matter: structure, mechanical and thermal properties; Cross-disciplinary physics: materials science; rheology; Electrical properties of specific thin films; Electrical properties of specific thin films and layer structures (multilayers, superlattices, quantum wells, wires, and dots); Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures; Exact sciences and technology; High- k gate dielectric; Interfacial layer; Low temperature long time annealing; Materials science; MBE; Physics; Rare earth oxides; Structure and morphology; thickness; Surface treatments; Surfaces and interfaces; thin films and whiskers (structure and nonelectronic properties); Thin film structure and morphology; Interfacial layer; MBE; Low temperature long time annealing; Chemical oxide; High- k gate dielectric; Rare earth oxides; Atomic force microscopy; Annealing; Surface treatments; Leakage currents; Fabrication property relation; Surface structure; CV characteristic; Thin films; Thickness; Gadolinium oxides; High-k gate dielectric; Dysprosium oxides; IV characteristic; X-ray photoelectron spectra
• ISSN: 0169-4332; 1873-5584
• DOI: 10.1016/S0169-4332(03)00439-2

Effect of chemical oxide and low temperature long time annealing on the electrical characteristics for rare earth oxides deposited on Si(1 0 0) were investigated. Formation of chemical oxide on Si substrates prior to the Gd 2O 3 depositions was found to decrease the leakage current significantly compared the films deposited on HF-last Si substrate, when the thickness was 3.5 nm or thicker, while the effect was not observed when the thickness was 2.8 nm. Annealing at 400 °C for 90 min also decreased leakage current of Dy 2O 3 thin films with little increase of capacitance equivalent thickness (CET).