Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

• Published in: Advances in radio science Vol. 15; pp. 123 - 130
• Main Authors: Elsobky, Mourad, Mahsereci, Yigit, Keck, Jürgen, Richter, Harald, Burghartz, Joachim N
• Format: Journal Article
• Language: English
• Published: Katlenburg-Lindau Copernicus GmbH 21.09.2017; Copernicus Publications
• Subjects: Amplification; Analog circuits; Analog to digital conversion; Analog to digital converters; Bridges; Circuit design; CMOS; Complementary metal oxide semiconductors; Design and construction; Digital technology; Digital to analog conversion; Digital to analog converters; Electric potential; Electronics; Flexibility; Flexible components; Foils; Hybrid systems; Integrated circuit fabrication; Linearity; Measuring instruments; Methods; New technology; Resistors; Robotics; Sensors; Silicon; Strain gauges; Substrates; Topology; Voltage; Wearable technology; Wheatstone bridges
• ISSN: 1684-9973; 1684-9965; 1684-9973
• DOI: 10.5194/ars-15-123-2017

Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.