Realization of Real-Time Fault-Tolerant Quantum Error Correction

• Published in: Physical review. X Vol. 11; no. 4; p. 041058
• Main Authors: Ryan-Anderson, C., Bohnet, J. G., Lee, K., Gresh, D., Hankin, A., Gaebler, J. P., Francois, D., Chernoguzov, A., Lucchetti, D., Brown, N. C., Gatterman, T. M., Halit, S. K., Gilmore, K., Gerber, J. A., Neyenhuis, B., Hayes, D., Stutz, R. P.
• Format: Journal Article
• Language: English
• Published: American Physical Society 01.12.2021
• ISSN: 2160-3308; 2160-3308
• DOI: 10.1103/PhysRevX.11.041058

Correcting errors in real time is essential for reliable large-scale quantum computations. Realizing this high-level function requires a system capable of several low-level primitives, including single-qubit and two-qubit operations, midcircuit measurements of subsets of qubits, real-time processing of measurement outcomes, and the ability to condition subsequent gate operations on those measurements. In this work, we use a 10-qubit quantum charge-coupled device trapped-ion quantum computer to encode a single logical qubit using the [[7,1,3]] color code, first proposed by Steane [Phys. Rev. Lett. 77, 793 (1996)PRLTAO0031-900710.1103/PhysRevLett.77.793]. The logical qubit is initialized into the eigenstates of three mutually unbiased bases using an encoding circuit, and we measure an average logical state preparation and measurement (SPAM) error of 1.7(2)×10^{-3}, compared to the average physical SPAM error 2.4(4)×10^{-3} of our qubits. We then perform multiple syndrome measurements on the encoded qubit, using a real-time decoder to determine any necessary corrections that are done either as software updates to the Pauli frame or as physically applied gates. Moreover, these procedures are done repeatedly while maintaining coherence, demonstrating a dynamically protected logical qubit memory. Additionally, we demonstrate non-Clifford qubit operations by encoding a T[over ¯]|+⟩_{L} magic state with an error rate below the threshold required for magic state distillation. Finally, we present system-level simulations that allow us to identify key hardware upgrades that may enable the system to reach the pseudothreshold.