Nanopore-application CMOS potentiostat design with input parasitic compensation

A low-noise area-efficient potentiostat design for nanopore applications is presented. By adopting a cascode amplifier and a Wilson current mirror, the input resistance is drastically decreased, which enables one to obtain a desirable bandwidth to detect DNA translocation events in nanopore sensors....

Full description

Saved in:
Bibliographic Details
Published inElectronics letters Vol. 50; no. 8; pp. 578 - 579
Main Authors Kim, Jungsuk, Dunbar, W.B
Format Journal Article
LanguageEnglish
Published Stevenage The Institution of Engineering and Technology 10.04.2014
Institution of Engineering and Technology
John Wiley & Sons, Inc
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A low-noise area-efficient potentiostat design for nanopore applications is presented. By adopting a cascode amplifier and a Wilson current mirror, the input resistance is drastically decreased, which enables one to obtain a desirable bandwidth to detect DNA translocation events in nanopore sensors. A novel compensation technique is also proposed to relieve a deleterious effect by the input parasitic capacitances.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0013-5194
1350-911X
1350-911X
DOI:10.1049/el.2014.0049