SNDR Limits of Oscillator-Based Sensor Readout Circuits

• Published in: Sensors (Basel, Switzerland) Vol. 18; no. 2; p. 445
• Main Authors: Cardes, Fernando, Quintero, Andres, Gutierrez, Eric, Buffa, Cesare, Wiesbauer, Andreas, Hernandez, Luis
• Format: Journal Article
• Language: English
• Published: Switzerland MDPI AG 03.02.2018; MDPI
• Subjects: CMOS; Computer simulation; Distortion; Model accuracy; Noise; oscillator-based sensor; Oscillators; phase noise; Sensors; Sigma-Delta modulation; Test methods; time-domain circuits; VCO-ADC; time-domain circuits; oscillator-based sensor; Sigma-Delta modulation; VCO-ADC; phase noise
• ISSN: 1424-8220; 1424-8220
• DOI: 10.3390/s18020445

This paper analyzes the influence of phase noise and distortion on the performance of oscillator-based sensor data acquisition systems. Circuit noise inherent to the oscillator circuit manifests as phase noise and limits the SNR. Moreover, oscillator nonlinearity generates distortion for large input signals. Phase noise analysis of oscillators is well known in the literature, but the relationship between phase noise and the SNR of an oscillator-based sensor is not straightforward. This paper proposes a model to estimate the influence of phase noise in the performance of an oscillator-based system by reflecting the phase noise to the oscillator input. The proposed model is based on periodic steady-state analysis tools to predict the SNR of the oscillator. The accuracy of this model has been validated by both simulation and experiment in a 130 nm CMOS prototype. We also propose a method to estimate the SNDR and the dynamic range of an oscillator-based readout circuit that improves by more than one order of magnitude the simulation time compared to standard time domain simulations. This speed up enables the optimization and verification of this kind of systems with iterative algorithms.