A High Efficiency E-Band CMOS Frequency Doubler With a Compensated Transformer-Based Balun for Matching Enhancement
This letter presents a broadband high efficiency frequency doubler based on a new and effective compensation technique. A transformer based input balun achieves good balanced performance and input matching by the newly invented central capacitor based compensation technique. It demonstrates a peak c...
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Published in | IEEE microwave and wireless components letters Vol. 26; no. 1; pp. 40 - 42 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.01.2016
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Subjects | |
Online Access | Get full text |
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Summary: | This letter presents a broadband high efficiency frequency doubler based on a new and effective compensation technique. A transformer based input balun achieves good balanced performance and input matching by the newly invented central capacitor based compensation technique. It demonstrates a peak conversion gain (CG) of - 2.5 dB and peak efficiency of 9.7% with a saturated output power of 2.5 dBm at 74 GHz. The doubler exhibits a 3 dB CG bandwidth of 28 GHz from 62 to 90 GHz. The fundamental rejection is larger than 20 dB. The doubler is fabricated in a 65 nm CMOS technology with chip area of 0.6\times 0.45\ {\rm mm}^{2} and consumes 9-14 mW power. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISSN: | 1531-1309 1558-1764 |
DOI: | 10.1109/LMWC.2015.2505617 |