CMOS Realization of All-Positive Pinched Hysteresis Loops

Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristan...

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Bibliographic Details
Published inComplexity (New York, N.Y.) Vol. 2017; no. 2017; pp. 1 - 15
Main Authors Maundy, Brent, Psychalinos, C., El Wakil, Ahmed
Format Journal Article
LanguageEnglish
Published Cairo, Egypt Hindawi Publishing Corporation 01.01.2017
Hindawi
John Wiley & Sons, Inc
Hindawi Limited
Wiley
Subjects
Analysis
Circuits
CMOS
Complementary metal oxide semiconductors
Hysteresis loops
Integrated circuits
Magnetic properties
Metal oxide semiconductors
Multiplication & division
Semiconductor devices
Signal processing
Transistors
United States
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Summary:Two novel nonlinear circuits that exhibit an all-positive pinched hysteresis loop are proposed. These circuits employ two NMOS transistors, one of which operates in its triode region, in addition to two first-order filter sections. We show the equivalency to a charge-controlled resistance (memristance) in a decremental state via detailed analysis. Simulation and experimental results verify the proposed theory.
ISSN:1076-2787
1099-0526
DOI:10.1155/2017/7863095