Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter

Offset mismatch, gain mismatch, and sample-time error between time-interleaved channels limit the performance of time-interleaved analog-to-digital converters (ADCs). This paper focuses on the sample-time error. Techniques for correcting and detecting sample-time error in a two-channel ADC are descr...

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Bibliographic Details
Published inIEEE transactions on circuits and systems. I, Regular papers Vol. 51; no. 1; pp. 130 - 139
Main Authors Jamal, S.M., Daihong Fu, Singh, M.P., Hurst, P.J., Lewis, S.H.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2004
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Analog to digital conversion
Analog-digital conversion
Apertures
Calibration
Channels
Circuits
Clocks
Computer errors
Converters
Error correction
Errors
Gain
Interleaved codes
Performance gain
Signal sampling
Simulation
Timing
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Summary:Offset mismatch, gain mismatch, and sample-time error between time-interleaved channels limit the performance of time-interleaved analog-to-digital converters (ADCs). This paper focuses on the sample-time error. Techniques for correcting and detecting sample-time error in a two-channel ADC are described, and simulation results are presented.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2003.821302