Crown-shaped stacked-capacitor cell for 1.5-V operation 64-Mb DRAMs

• Published in: IEEE transactions on electron devices Vol. 38; no. 2; pp. 255 - 261
• Main Authors: Kaga, T., Kure, T., Shinriki, H., Kawamoto, Y., Murai, F., Nishida, T., Nakagome, Y., Hisamoto, D., Kisu, T., Takeda, E., Itoh, K.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.02.1991; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Associate members; Capacitance; Capacitors; Circuit testing; Electrodes; Electronics; Exact sciences and technology; Fabrication; Integrated circuits; Integrated circuits by function (including memories and processors); Lithography; Power supplies; Random access memory; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Voltage; Coronal cell; Microelectronic fabrication; Random access memory(RAM); Stacking; Electron beam lithography; Memory; Self alignment; Dynamical storage; Measurement method; Capacitor; Electrical characteristic
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.69903

A self-aligned stacked-capacitor cell called the CROWN cell (a crown-shaped stacked-capacitor cell), used for experimental 64-Mb-DRAMs operated at 1.5 V, has been developed using 0.3- mu m electron-beam lithography. This memory cell has an area of 1.28 mu m/sup 2/. The word-line pitch and sense-amplifier pitch of this cell are 0.8 and 1.6 mu m, respectively. In spite of this small cell area, the CROWN cell has a large capacitor surface area of 3.7 mu m/sup 2/ because (1) it has a crown-shaped capacitor electrode, (2) its capacitor is on the data line, and (3) it has a self-aligned memory cell fabrication process and structure. The large capacitor area and a Ta/sub 2/O/sub 5/ film equivalent to a 2.8-nm SiO/sub 2/ film ensure a large storage charge of 33 fC (storage capacitance equals 44 fF) for 1.5-V operation. A small CROWN cell array and a memory test circuit were successfully used to achieve a basic DRAM cell operation.< >