Suppressing the hot carrier injection degradation rate in total ionizing dose effect hardened nMOSFETs

Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose (TID) effect. However, their capability of resisting the hot carrier effect (HCE) has also been proven to be very weak. In this paper, the reason why th...

Full description

Saved in:
Bibliographic Details
Published inChinese physics B Vol. 20; no. 11; pp. 346 - 352
Main Author 陈建军 陈书明 梁斌 何益百 池雅庆 邓科峰
Format Journal Article
LanguageEnglish
Published IOP Publishing 01.11.2011
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose (TID) effect. However, their capability of resisting the hot carrier effect (HCE) has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers (the annular source nMOSFETs) are also studied to provide a possible alternative for the designers.
Bibliography:Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose (TID) effect. However, their capability of resisting the hot carrier effect (HCE) has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers (the annular source nMOSFETs) are also studied to provide a possible alternative for the designers.
annular gate nMOSFETs; total ionizing dose effect; hot carrier effect; annular sourcenMOSFETs
Chen Jian-Jun,Chen Shu-Ming,Liang Bin,He Yi-Bai,Chi Ya-Qing,Deng Ke-Feng(School of Computer Science, National University of Defense Technology, Changsha 410073, China)
11-5639/O4
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1674-1056
2058-3834
DOI:10.1088/1674-1056/20/11/114220