Performance Analysis of 60-nm Gate-Length III-V InGaAs HEMTs: Simulations Versus Experiments

• Published in: IEEE transactions on electron devices Vol. 56; no. 7; pp. 1377 - 1387
• Main Authors: Neophytou, N., Rakshit, T., Lundstrom, M.S.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.07.2009; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Apparent; Applied sciences; ballistic; Electronics; Exact sciences and technology; high electron mobility transistor (HEMT); III-V; InAs; InGaAs; mobility; nonequilibrium Green's function (NEGF); nonparabolicity; quantum; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; series resistance; source exhaustion; source starvation; Transistors; Performance evaluation; Voltage threshold; mobility; Voltage current curve; Barrier layer; source starvation; quantum; Ballistic transport; InGaAs; High electron mobility transistor; III-V; Non equilibrium conditions; Series resistance; Transconductance; Damaging; High performance; nonequilibrium Green's function (NEGF); Voltage dependence; Gate voltage; source exhaustion; Dielectric materials; Apparent; ballistic; nonparabolicity; Green function; III-V compound; High voltage; InAs; First order; Capacitance; Parasitic resistance; Drain voltage; Barrier height; Wide band gap semiconductors; high electron mobility transistor (HEMT); Charge carrier injection
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2009.2021437

An analysis of recent experimental data for high-performance In 0.7 Ga 0.3 As high electron mobility transistors (HEMTs) for logic applications is presented. By using a fully quantum mechanical ballistic model, we simulate In 0.7 Ga 0.3 As HEMTs with gate lengths of L G = 60, 85, and 135 nm and compare the result to the measured IV characteristics, including drain-induced barrier lowering, subthreshold swing, and threshold voltage variation with gate insulator (wide-bandgap barrier layer) thickness, as well as on-current performance. To first order, devices with three different oxide thicknesses and channel lengths can all be described by a ballistic model for the channel with appropriate values of parasitic series resistance. For high gate and drain voltages ( V GS -V T =0.5 V and V DS =0.5 V), however, the ballistic simulations consistently overestimate the measured on-current (a sign of higher transconductance), and they do not show the experimentally observed decrease in on-current with increasing gate length. With no parasitic series resistance at all, the simulated on-current of the L G = 60 nm device is about twice the measured current. According to the simulation, the estimated ballistic carrier injection velocity for this device is about 2.7 times 10 7 cm/s. Because of the importance of the semiconductor capacitance, the simulated gate capacitance is about 2.5 times less than the insulator/barrier capacitance. Possible causes of the transconductance degradation observed experimentally under high gate voltages in these devices are also explored. In addition to a possible gate-voltage-dependent scattering mechanism, the limited ability of the source to supply carriers to the channel and the effect of nonparabolicity are likely to play a role. The drop in the on-current at higher gate biases with increasing gate length, is an indication that the devices operate below the ballistic limit.